1. Field of the Invention
The present invention relates to a voltage supply circuit which supplies a voltage to a load circuit in a semiconductor device.
2. Description of the Related Art
In a semiconductor device, a voltage supply circuit which can supply a large enough current when said circuit operates normally and which has little leak current at a standby time when the internal circuit stops its operation is desired.
FIG. 1 is a circuit diagram of a voltage supply circuit 11 of a conventional semiconductor device. The voltage supply circuit 11 shown in FIG. 1 connects the drain of an n-channel MOS transistor TR1 to a power supply voltage vdd, and the source to a load circuit 12.
The voltage supply circuit 11 can control the voltage Vii supplied to the load circuit 12 when said circuit operates normally by controlling the gate voltage of the n-channel MOS transistor TR1. The voltage supply circuit shown in FIG. 1 turns off the MOS transistor TR1 when said circuit is on standby by making the gate voltage Vg grounding potential, and intercepts the leak current from the power supply voltage vdd.
The development of a low-voltage semiconductor device has advanced in recent years, and it is getting difficult to realize a low-voltage supply circuit by a MOS transistor whose threshold voltage is an ordinary voltage such as 0.6 V or so.
Then, it is considered to configure a voltage supply circuit using a MOS transistor whose threshold voltage is lower than that of an ordinary MOS transistor.
FIG. 2 shows an example of the voltage supply circuit using an N-channel MOS transistor TR3 having a low threshold voltage. The two vertical lines between the drain and source of the MOS transistor TR3 shown in FIG. 2 indicate that the MOS transistor TR3 is a MOS transistor having a low threshold voltage.
FIG. 3 shows the characteristics of the drain voltage versus the voltage V between the gate and source of an enhancement type of n-channel MOS transistor.
In the enhancement type of MOS transistor, when, for example, the current I ds flowing between the drain and the source is 1 μA, the voltage between the gate and source is defined as a threshold voltage V th, as shown in FIG. 3. As is apparent from FIG. 3, a current flows between the drain and source of the n-channel MOS transistor even when the voltage V gs between the gate and the source is equivalent to or less than the threshold voltage V th.
The n-channel MOS transistor having a low threshold voltage has characteristics that a leak current increases as compared with a n-channel MOS transistor having an ordinary threshold voltage. Therefore, in the voltage supply circuit 13 shown in FIG. 2, the leak current is limited by connecting a p-channel MOS transistor TR2 on the power supply side and turning off the p-channel MOS transistor TR2 when the voltage supply circuit is on standby.
Described below is the operation of the voltage supply circuit shown in FIG. 2 when said circuit is on standby. To make understanding easy, an example when the power supply voltage vdd is 2 V is taken. In this case, 2 V is applied to the p-channel MOS transistor TR2 as a gate voltage U 1p when the voltage supply circuit is on standby, and 0 V is applied to the N-channel MOS transistor TR3 as a gate voltage Vg.
If it is supposed that the characteristics of the p-channel MOS transistor TR2 and the n-channel MOS transistor TR3 are the same, and the resistance values when these two transistors are turned off are almost the same, the potential at the connecting point a of the p-channel MOS transistor TR2 and the n-channel MOS transistor TR3 is ½ of the power supply voltage vdd (=2 V), i.e. 1 V.
Consequently, the voltage V gs between the gate and source of the p-channel MOS transistor TR2 is 2-2=0 V, and the voltage V gs between the gate and source of the n-channel MOS transistor TR3 is 0−0=0 V.
In this case, the leak current flowing from the power supply voltage vdd to the load circuit via the MOS transistors TR2 and TR3 becomes equal to the leak current when the voltage V gs P=0 V between the gate and source of the p-channel MOS transistor TR2 having an ordinary threshold voltage, because the leak current of the MOS transistor TR2 having a low threshold voltage is larger.
In order to decrease the leak current of the voltage supply circuit, decreasing the leak current of the p-channel MOS transistor by providing the n-channel MOS transistor in the current path of the power supply standby circuit using the p-channel MOS transistor having a low threshold voltage and turning off the n-channel MOS transistor is described, for example, in patent document 1.
Described in patent document 2 is a circuit which realizes a high operation speed and low consumption power in a logic circuit using a CMOS circuit having a plurality of threshold voltages. Thus, it is described in the invention of patent document 2 that a MOS transistor having a high threshold voltage is connected between the CMOS logic circuit having a plurality threshold voltages and a power supply line, and between the CMOS logic circuit having a plurality threshold voltages and a grounding conductor, and when the circuit changes to a standby state, the MOS transistor having a high threshold voltage is turned off and a leak current is decreased.
However, the invention of patent document 1 or patent document 2 is intended to decrease a leak current by connecting a MOS transistor on the current path of a power supply line or a grounding conductor and a load circuit, and turning off the MOS transistor having a high threshold voltage, but is not intended to decrease the leak current itself of the MOS transistor.                Patent document: Kokai (Jpn. Unexamined patent publication) No. 2002-314393        Patent document: Kokai (Jpn. Unexamined patent publication) No. 2003-198354        